1. Field of the Invention
This invention relates to semiconductor device testing means, and more particularly, to a test structure which is part of an integrated circuit chip, allowing testing of a semiconductor device through the device pins thereof.
2. Description of the Prior Art
It will be readily recognized that testing of a semiconductor device through the device pins thereof is highly advantageous. This would allow appropriate testing of the device in its packaged environment so that meaningful test information can be achieved. It would be also advantageous that this be achieved through the use of an on-chip test structure which further allows that once testing is undertaken, various parameters of the circuit can be adjusted for attainment of optimum performance, with the circuit portion having been adjusted (if needed) operating under normal conditions without degradation in relation to its optimum design situation.
Heretofore, the previous goals have not been achieved. While, various devices include on-chip circuit elements connected with the pins thereof (see FIG. 1 showing an input continuity diode, FIG. 2 showing an LS TTL input structure, and FIG. 3 showing a TTL input structure, all labeled as prior art), there is no disclosure of a test structure connected to a circuit portion as part of a semiconductor device for allowing testing of the circuit portion through pins of the device.